The present invention relates to liquid crystal on silicon having pixel cell arrays for silicon light valves and in particular to microdisplays comprising a liquid crystal on silicon.
Liquid crystal displays (LCDs) are commonly used in devices such as portable televisions, portable computers, control displays, and cellular phones to display information to a user. LCDs act in effect as a light valve, i.e., they allow transmission of light in one state, block the transmission of light in a second state, and some include several intermediate stages for partial transmission. When used as a high resolution information display, as in one application of the present invention, LCDs are typically arranged in a matrix configuration with independently controlled pixels (the smallest segment of the display). Each individual pixel is signaled to selectively transmit or block light from a backlight (transmission mode), from a reflector (reflective mode), or from a combination of the two (transflective mode).
LCDs are actuated pixel-by-pixel, either one at a time or a plurality simultaneously. A voltage is applied to each pixel mirror electrode and the liquid crystal responds to the voltage by transmitting a corresponding amount of light. In some LCDs an increase in the actuation voltage decreases transmission, while in others it increases transmission. When multiple colors are involved for each pixel, multiple voltages are applied to the pixel at different positions or times depending upon the LCD. Each voltage controls the transmission of a particular color. For example, one pixel can be actuated to allow only blue light to be transmitted while another allows only green. A greater number of different light levels available for each color results in a much greater number of possible combination colors.
Converting a complex digital signal that represents an image or video into voltages to be applied to the pixels of an LCD involves circuitry that can limit the monochrome resolution. The signals necessary to drive a single color of an LCD are both digital and analog. It is digital in that each pixel requires a separate selection signal, but it is analog in that an actual voltage is applied to the pixel to determine light transmission.
Each pixel in the core array of the LCD is addressed by both a column (vertical) driver and a row (horizontal) driver. The column driver turns on an analog switch that connects an analog voltage representative of the video input (control voltage necessary for the desired liquid crystal twist) to the column, and the row driver turns on a second analog switch that connects the column to the desired pixel.
The video inputs to the LCD are analog signals centered around a center reference voltage of typically from about 6.0 to 8.0 volts. This center reference voltage is not a supply or signal from anywhere, rather it is a mathematical entity. Nearly the same as the center reference voltage is a voltage called xe2x80x9cVCOM,xe2x80x9d which connects to the LCD cover glass electrode, which is a transparent conductive coating on the inside face (liquid crystal side) of the cover glass. This transparent conductive coating is typically Indium Tin Oxide (ITO).
One frame of video pixels are run at voltages above the center reference voltage (positive inversion) and for the next frame the video pixels are run at voltages below the center reference voltage (negative inversion). Alternating between positive and negative inversions results in a zero net DC bias at each pixel.
FIG. 1 shows a cross-sectional view of adjacent LC transducer pixel cells in a conventional light valve. Light valve portion 100 comprises adjacent pixel cells 110a and 110b having liquid crystal (LC) material 111 sandwiched within gap 106 between a top plate and a bottom plate. Top plate 102 is composed of a translucent material, typically glass. The bottom plate is formed by the reflective metal pixel electrodes 112a and 112b of adjacent pixels 110a and 110b, respectively. These pixel electrodes function therefore as mirrors which reflect the light.
Pixel electrodes 112a and 112b are separated and electrically isolated by trench 118. Pixel electrodes 112a and 112b lie on top of an upper intermetal dielectric layer 128 that is one component of interconnect scheme 104. Interconnect 104 overlies capacitor structures 118a and 118b formed within underlying silicon substrate 105. Underlying capacitors 118a and 118b are in electrical communication with pixel electrodes 112a and 112b, respectively, through metal-filled vias 140 and middle interconnect metallization layer 124 and lower interconnect metallization layer 122. For protection and enhanced reflective characteristics a passivation layer and an alignment layer 116 are deposited on top of the pixel electrodes.
The conventional pixel array described above in FIG. 1 functions adequately in many applications. However, this design suffers from the disadvantage that such a display can experience image retention if mobile ions can enter and charge the liquid crystal alignment layer with the retained image resulting in significant degradation of a displayed image.
Therefore, there is a need in the art for a pixel array and a process of forming a pixel array where image retention is avoided.
The invention overcomes the above-identified problems as well as other shortcomings and deficiencies of existing technologies in one embodiment by a liquid crystal on silicon device comprising a mirror layer comprising a plurality of mirror electrodes, a passivation layer formed on the surface of the mirror layer comprising a plurality of openings to the mirror electrodes, and a liquid crystal layer being arranged on top of the alignment layer. Ions trapped in the alignment layer are discharged or electrochemically inverted to an inert state through the opening by means of the pixel electrodes of the mirror layer.
Another embodiment is a semiconductor arrangement within a liquid crystal on silicon device which comprises a substrate having a first and second surface. The substrate comprises a source/drain region which extends from the first surface into the substrate. The arrangement further comprises a dielectric layer deposited on the first surface of the substrate having a surface, a gate region within the dielectric layer, a mirror layer forming a plurality of pixel mirrors extending from the surface of the dielectric layer being electrically coupled with the source/drain region, a passivation layer formed on the surface of the mirror layer comprising an opening to the mirror region, and a liquid crystal alignment layer formed on the passivation layer.
The semiconductor arrangement can further comprise a conductive path reaching from the surface of the source/drain region to the mirror region. The conductive path can be formed by a first via coupling the source/drain region with a metallization layer embedded between the source/drain region and the mirror region and a second via coupling the metallization layer with the mirror region. The passivation layer can be a reflectivity enhancement coating comprising a silicon dioxide layer and a silicon nitride layer. Pluralities of these layers can be formed on top of the structure in an alternating fashion. The opening can be filled with conducting material or with the alignment layer. The conducting material can be one of tungsten, aluminum or wolfram and the opening can comprise a diameter of approximately 1 xcexcm and have the shape of a circle.
A method of manufacturing a semiconductor arrangement according to another aspect of the present invention comprises the steps of:
forming a semiconductor device having a dielectric layer and a plurality of pixel mirror electrodes arranged on top of the dielectric layer;
forming a passivation layer on top of the pixel mirror electrodes;
etching an opening to the surface of the pixel mirror electrode in the passivation layer.
In one enhancement of the method a further step comprises forming of an alignment layer on top of the passivation layer. In another enhancement the opening is filled with a conductive material. The step of filling the opening with a conductive material can comprise the steps of:
forming a conductive layer on top of the passivation layer filling said opening;
removing the conductive layer thereby planarizing the surface of the semiconductor arrangement.
Another the step can comprise the forming of an alignment layer on top of the planarized surface.
The foregoing and other objects, features, and advantages of the invention will be apparent from the following, more particular, description of the preferred embodiments of the invention, as illustrated in the accompanying drawings.